The whole world of Samsung firsts publish DDR 2.0 interface 64Gb MLC flashing memory

May 14, 2011 by · Leave a Comment
Filed under: Chip Road 

Samsung announces today, the company has already begun to produce global first batch of toggle DDR 2.0 interface MLC flashing memory chips at a , the capacity is 64Gb8GB ,Use the 20nm grade craft to make.

Last July, Samsung Toshiba claimed to promote 2.0 interface of Toggle DDR to become the standard specification of the trade together. The new interface can read and write the bandwidth of the flashing memory to bring up to 400Mbps, and DDR 1.0 standard is 133Mbps, the ordinary SDR NAND flashing memory is only 40Mbps.

The new flashing memory that announces this time exactly employs the first batch of products in this interface, are directed primarily to intellectual , dull and stereotyped machine and solid condition of high side. Samsung’s high level is represented, of interface let new the intersection of MLC and the intersection of flashing memory and meeting 4 the intersection of generation and intellectual , the intersection of SATA and the intersection of 6Gbps and the intersection of solid condition and and USB 3.0 demand of product fine.

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